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產(chǎn)品名稱：STR911FAM42
產(chǎn)品封裝：QFP-80
產(chǎn)品品牌：STMicroelectronics
庫(kù) 存：查看
電 話：0755-83035811
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產(chǎn)品介紹
STR911FAM42
Features
- 16/32-bit 96 MHz ARM9E based MCU
- ARM966E-S RISC core: Harvard architecture, 5-stage pipeline, Tightly-Coupled Memories (SRAM and Flash)
- STR91xFA implementation of core adds high-speed burst Flash memory interface, instruction prefetch queue, branch cache
- Up to 96 MIPS directly from Flash memory
- Single-cycle DSP instructions supported
- Binary compatible with ARM7 code
- Dual burst Flash memories, 32-bits wide
- 256 KB/512 KB/1 MB/2 MB main Flash
- 32 KB/128 KB secondary Flash
- Sequential Burst operation up to 96 MHz
- 100 K min erase cycles, 20 yr min retention
- SRAM, 32-bits wide
- 64K or 96K bytes, optional battery backup
- 9 programmable DMA channels
- Clock, reset, and supply management
- Internal oscillator operating with external 4-25 MHz crystal
- Internal PLL up to 96 MHz
- Real-time clock provides calendar functions, tamper, and wake-up functions
- Reset Supervisor monitors supply voltage, watchdog, wake-up unit, external reset
- Run, Idle, and Sleep Mode as low as 50 uA
- Vectored interrupt controller (VIC)
- 32 IRQ vectors, 30 interrupt pins
- Branch cache minimizes interrupt latency
- 8-channel, 10-bit A/D converter (ADC)
- 0 to 3.6 V range, 0.7 usec conversion
- 10 Communication interfaces
- 10/100 Ethernet MAC with DMA and MII
- USB Full-speed (12 Mbps) slave device
- CAN interface (2.0B Active)
- 3 16550-style UARTs with IrDA protocol
- 2 channels for SPI™, SSI™, or MICROWIRE™
- External Memory Interface (EMI)
- 8- or 16-bit data, up to 24-bit addressing
- Static Async modes for LQFP128
- Additional burst synchronous modes for LFBGA144
- Up to 80 I/O pins (muxed with interfaces)
- 16-bit standard timers (TIM)
- 4 timers each with 2 input capture, 2 output compare, PWM and pulse count modes
- 3-Phase induction motor controller (IMC)
- JTAG interface with boundary scan
- Embedded trace module (ARM ETM9
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