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二極管

USB

三極管

可控硅(晶閘管)

場效應管(MOSFET)

集成電路

連接器

LED系列產品

電感器

繼電器

傳感器

電容器

電阻器

保護器件

光電器件

壓電晶體

開關原件

功率模塊

特性

• Control Inputs V_IH/V_IL Levels Are Referenced to V_CCA Voltage
• V_CC Isolation Feature – If Either V_CC Input Is at GND,
  All Outputs Are in the High-Impedance State
• Overvoltage-Tolerant Inputs/Outputs Allow
  Mixed-Voltage-Mode Data Communications
• Fully Configurable Dual-Rail Design Allows Each Port to Operate
  Over the Full 1.65-V to 5.5-V Power-Supply Range
• Bus Hold on Data Inputs Eliminates the Need for
  External Pullup/Pulldown Resistors
• I_off Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)
• SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
  • Controlled Baseline
  • One Assembly/Test Site
  • One Fabrication Site
  • Available in Military (–55°C/125°C) Temperature Ranges⁽¹⁾
  • Extended Product Life Cycle
  • Extended Product-Change Notification
  • Product Traceability

⁽¹⁾ Additional temperature ranges are available – contact factory

DESCRIPTION/ORDERING INFORMATION

This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track V_CCB. V_CCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

The SN74LVCH16T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by V_CCA.

The SN74LVCH16T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess I_CC and I_CCZ.

Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The V_CC isolation feature ensures that if either V_CC input is at GND, then all outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.