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二極管

USB

三極管

可控硅(晶閘管)

場效應(yīng)管(MOSFET)

集成電路

連接器

LED系列產(chǎn)品

電感器

繼電器

傳感器

電容器

電阻器

保護器件

光電器件

壓電晶體

開關(guān)原件

功率模塊

特性

• Control Inputs V_IH/V_IL Levels Are Referenced to V_CCA Voltage
• V_CC Isolation Feature — If Either V_CC Input Is at GND, All I/O Ports Are in the High-Impedance State
• I_off Supports Partial-Power-Down Mode Operation
• Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range
• I/Os Are 4.6-V Tolerant
• Max Data Rates:
  • 320 Mbps (V_CCA ≤ 1.8 V and V_CCB ≤ 1.8 V)
  • 170 Mbps (V_CCA ≥ 1.8 V or V_CCB ≥ 1.8 V)
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 8000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVCH8T245 is optimized to operate with V_CCA/V_CCB set at 1.4 V to 3.6 V. It is operational with V_CCA/V_CCB as low as 1.2 V. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track V_CCB. V_CCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCH8T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.

The SN74AVCH8T245 is designed so the control pins (DIR and OE) are supplied by V_CCA.

The SN74AVCH8T245 solution is compatible with a single-supply system and can be replaced later with a '245 function, with minimal printed circuit board redesign.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The V_CC isolation feature ensures that if either V_CC input is at GND, both outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

To ensure the high-impedance state during power up or power down, OE shall be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.