品牌索引 產(chǎn)品分類 > 小信號開關(guān)二極管> 瞬態(tài)電壓抑制器TVS/ESD> 雙極管二極管> 調(diào)諧二極管> 齊納(穩(wěn)壓)二極管> 小信號肖特基二極管> 頻帶轉(zhuǎn)換二極管> 中/高功率管> 射頻PIN二極管> Sinterglass二極管> 整流器 > 可編程單結(jié)晶體管 (PUT)> SIDAC> 可控硅整流管 (SC) > 晶閘管浪涌保護器件 (TSPD)> 三端雙向可控硅開關(guān)元件 (TRIAC)> 半導(dǎo)體閘流管> 快速分立式> 相控分立式 > N溝道(N-Channel)> P溝道(P-Channel)> 雙N溝道(Dual N-Channel)> 雙P溝道(Dual P-Channel)> 雙N和P溝道(Dual N and P-Channel)
|
產(chǎn)品介紹
說明
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A-port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AVCBH164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated. The SN74AVCBH164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCB . Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. To ensure the high-impedance state during power up or power down, OE should be tied to VCCB through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, both ports are in the high-impedance state. 特性
|