品牌索引
產品分類 > 小信號開關二極管> 瞬態電壓抑制器TVS/ESD> 雙極管二極管> 調諧二極管> 齊納(穩壓)二極管> 小信號肖特基二極管> 頻帶轉換二極管> 中/高功率管> 射頻PIN二極管> Sinterglass二極管> 整流器 > N溝道(N-Channel)> P溝道(P-Channel)> 雙N溝道(Dual N-Channel)> 雙P溝道(Dual P-Channel)> 雙N和P溝道(Dual N and P-Channel)
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產品介紹 SN74AUP1T57 說明
AUP technology is the industry’s lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T57 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply. The wide VCC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range. Schmitt-trigger inputs ( The SN74AUP1T57 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCC or ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed. Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions. The SN74AUP1T57 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs. NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package. 特性
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VT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.