品牌索引
產(chǎn)品分類 > 小信號開關(guān)二極管> 瞬態(tài)電壓抑制器TVS/ESD> 雙極管二極管> 調(diào)諧二極管> 齊納(穩(wěn)壓)二極管> 小信號肖特基二極管> 頻帶轉(zhuǎn)換二極管> 中/高功率管> 射頻PIN二極管> Sinterglass二極管> 整流器 > 可編程單結(jié)晶體管 (PUT)> SIDAC> 可控硅整流管 (SC) > 晶閘管浪涌保護(hù)器件 (TSPD)> 三端雙向可控硅開關(guān)元件 (TRIAC)> 半導(dǎo)體閘流管> 快速分立式> 相控分立式 > N溝道(N-Channel)> P溝道(P-Channel)> 雙N溝道(Dual N-Channel)> 雙P溝道(Dual P-Channel)> 雙N和P溝道(Dual N and P-Channel)
|
產(chǎn)品介紹
說明
These 36-bit UBTs combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Data flow for B to A is similar to that of A to B, but uses OEBA\, LEBA, and CLKBA. Output-enable OEAB is active high. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state. The output enables are complementary (OEAB is active high, and OEBA\ is active low). When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN54ABTH32501 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABTH32501 is characterized for operation from -40°C to 85°C 特性
|
