CY7C68034-56LTXI
Features
■ Certified compliant for bus- or self-powered USB 2.0 operation
(TID# 40490118)
■ Single-chip, integrated USB 2.0 transceiver and smart SIE
■ Ultra low power – 43 mA typical current draw in any mode
■ Enhanced 8051 core
❐ Firmware runs from internal RAM that is downloaded from
NAND Flash at startup
❐ No external EEPROM required
■ 15 KBytes of on-chip code/data RAM
❐ Default NAND firmware – 8 kB
❐ Default free space – 7 kB
■ Four programmable bulk/interrupt/isochronous endpoints
❐ Buffering options: double, triple, and quad
■ Additional programmable (bulk/interrupt) 64-byte endpoint
■ SmartMedia standard hardware ECC generation with 1-bit
correction and 2-bit detection
■ General programmable interface (GPIF)
❐ Enables direct connection to most parallel interfaces
❐ Programmable waveform descriptors and configuration
registers to define waveforms
❐ Supports multiple ready (RDY) inputs and control (CTL)
outputs
■ 12 fully programmable general purpose I/O (GPIO) pins
■ Integrated, industry-standard enhanced 8051
❐ 48-MHz, 24-MHz, or 12-MHz CPU operation
❐ Four clocks for each instruction cycle
❐ Three counter/timers
❐ Expanded interrupt system
❐ Two data pointers
■ 3.3-V operation with 5 V tolerant inputs
■ Vectored USB interrupts and GPIF/FIFO interrupts
■ Separate data buffers for the setup and data portions of a
control transfer
■ Integrated I2C controller, runs at 100 or 400 kHz
■ Four integrated FIFOs
❐ Integrated glue logic and FIFOs lower system cost
❐ Automatic conversion to and from 16-bit buses
❐ Master or slave operation
❐ Uses external clock or asynchronous strobes
❐ Easy interface to ASIC and DSP ICs
■ Available in space saving 56-pin QFN package
