品牌索引 產品分類 > 小信號開關二極管> 瞬態電壓抑制器TVS/ESD> 雙極管二極管> 調諧二極管> 齊納(穩壓)二極管> 小信號肖特基二極管> 頻帶轉換二極管> 中/高功率管> 射頻PIN二極管> Sinterglass二極管> 整流器 > N溝道(N-Channel)> P溝道(P-Channel)> 雙N溝道(Dual N-Channel)> 雙P溝道(Dual P-Channel)> 雙N和P溝道(Dual N and P-Channel)
|
產品介紹 73S1217FFEATURES
80515 Core: • 1 clock cycle per instruction (most instructions) • CPU clocked up to 24MHz • 64kB Flash memory (lockable) • 2kB XRAM (User Data Memory) • 256 byte IRAM • Hardware watchdog timer Oscillators: • Single low-cost 6MHz to 12MHz crystal • Optional 32kHz crystal (with internal RTC) • An Internal PLL provides all the necessary clocks to each block of the system Interrupts: • Standard 80C515 4-priority level structure • 9 different sources of interrupt to the core Power Down Modes: • 2 standard 80C515 Power Down and IDLE modes • Sub-μA OFF mode ON/OFF Main System Power Switch: • Input for an SPST momentary switch to ground Timers: • (2) Standard 80C52 timers T0 and T1 • (1) 16-bit timer that can generate RTC interrupts from the 32kHz clock Built-in ISO-7816 Card Interface: • LDO regulator produces VCC for the card • (1.8V, 3V or 5V) • Full compliance with EMV 4.1 • Activation/Deactivation sequencers • Auxiliary I/O lines (C4-C8 signals) • 7kV ESD protection on all interface pins Communication with Smart Cards: • ISO 7816 UART for T=0, T=1 • (2) 2-Byte FIFOs for transmit and receive • Configured to drive multiple external Teridian 73S8010xx interfaces (for multi-SAM architectures) |